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Job Description:

Perform physical design of 3nm/5nm Mutli-GHz designs for ASIC products. Be able to come up with floorplan, power plan, CTS, routing and timing closure of the design using state-of-art EDA tools like Innovus/ICC/Primetime. Work closely with designers and must be able to write TCL script to perform semi-custom P&R optimizations to achieve design specs (STA/IR/EM/LVS/DRC). Experience on working on low-power/high speed design and able to analyze signal integrity/IR drop is a plus. In addition, candidate has to come up with technical solutions independently and also have leadership skills when working with customers and cross functional team.

May also review vendor capability to support development. Works on complex issues where analysis of situations or data requires an in-depth evaluation of variable factors. Exercises judgment in selecting methods, techniques and evaluation criteria for obtaining results.

Requirements:

• MSEE/MSCS 8+ years (BSEE/BSCS 10+ years)

• Expertise in Cadence Innovus/ICC physical design tools

• Experience on Calibre LVS/DRC

• Low power, signal integrity experience

• Work closely with RTL designers

• Strong TCL scripting knowledge required, Perl is a plus.

• Good debug skill and be able to work around issues

• Tape out experience

• Must be a good team player

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

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