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Design Engineer Jobs in Santa Clara, CA
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Senior Mixed Signal Design Engineer
Santa Clara, California -
Senior SOC Design Engineer
Santa Clara, California -
System Design Engineer
Santa Clara, California -
Senior Mixed Design Validation Systems-Electrical/Optical Engineer
Santa Clara, California -
Analog IC Design Engineer - Custom Power Products (Santa Clara)
Santa Clara, California -
PCB Design Layout Engineer
Santa Clara, California -
Senior Mixed Design Validation Systems-Electrical/Optical Engineer
Santa Clara, California -
Senior Silicon Circuits System Design Engineer
Santa Clara, California -
Senior Physical Design Methodology Engineer, PPA Improvement Technology Scaling
Santa Clara, California -
Senior Physical Design Methodology Engineer, Innovus Flows
Santa Clara, California -
SRAM Circuit Design Engineer
Santa Clara, California -
Sr.Staff SoC Lead design verification Engineer
Santa Clara, California -
CPU Physical Design Methodology and Optimization Engineer
Santa Clara, California -
CPU Physical Design Methodology and Optimization Engineer
Santa Clara, California -
Design Engineer, AR Waveguide III (E3)
Santa Clara, California
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Design Engineer- Waveguide III (E3)
Santa Clara, California -
Physical Design Engineer
Santa Clara, California -
Graphics Cache Hierarchy Design Verification Engineer
Santa Clara, California -
Graphics (GPU) RTL Design Engineer
Santa Clara, California -
Graphics Cache Hierarchy Design Verification Engineer
Santa Clara, California -
GPU Design Engineer – Memory Hierarchy
Santa Clara, California -
GPU Design Engineer – Memory Hierarchy
Santa Clara, California -
GPU Design Engineer – Memory Hierarchy
Santa Clara, California -
Senior SOC Design Engineer
Santa Clara, California -
Senior ASIC Design Engineer - Hardware
Santa Clara, California -
Senior ASIC Design Engineer
Santa Clara, California -
RF Process Design Kits Engineer, Design Enablement (2025 New College Graduate)
Santa Clara, California -
Senior Mixed Signal Design Engineer
Santa Clara, California -
Mixed Signal Design Engineer - New College Grad 2024
Santa Clara, California -
CPU Design Timing Engineer
Santa Clara, California
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