Job Information
Google Central Processing Unit Physical Design Implementation Engineer, Silicon in New Taipei City, Taiwan
Google welcomes people with disabilities.
Minimum qualifications:
Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience.
3 years of experience in physical design.
Experience in one or more sign-off convergence in Static timing analysis (STA) electrical checks and physical verification domains.
Expertise in high-performance, low-power physical design and implementation techniques with industry standard implementation and signoff tools.
Preferred qualifications:
3 years of industry experience with high-performance CPUs.
Experience in using Static Timing Analysis (STA), power grid network delivery, and power analysis tools.
Knowledge of Central Processing Unit (CPU) including critical iterations for timing and low power microarchitecture and implementation techniques for CPUs.
Knowledge of computer architecture, logic design, RTL and Knowledge of Verilog/SystemVerilog.
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Develop RTL2GDS Physical Design tools and flows for advanced CPU designs to achieve Performance, Power, Area (PPA).
Collaborate with the Register-Transfer Level (RTL) Design teams on micro-architectural critical items for timing and power convergence.
Manage block and hierarchical design physical implementation and Quality of Result (QoR) (e.g., power, timing, area).
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCPEEOPost.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.